Let's see what this beast of mine actually does. The card creates four I/O ports, by default at addresses between 0ECh and 0EFh, however this can be modified with a jumper. The software searches for the card in the full port range of 0E0h-0EFh, so in theory there can be even four cards connected to your Enterprise (At that time I thought mainly about hard disks accessible for an average EP user, thrown out from PCs with capacity like 20-40 Mbytes - so you would have needed many of them).
Unfortunately - for us - the IDE bus is 16 bits wide, so we have 0th port as the lower 8 bits of the data port, and the 1st port is for the high 8 bits. The remaining two ports are used as the command ports for the two connectors. The lower three bits of the command port are the IDE address bits, the next bit is the CS0/CS1 address bit, and the next two bits are the write/read signals. The two bits left are not connected for output, but as input you can access the INT and PDIAG signals of the IDE bus there.
The lower 6 bits are connected for both of input and output, so you can read back the lower 6 bits of the value written previously to the command ports. This is the way the software searches for the card as well: the lower 4 bits are tested with values between 0 and 15 that it can be read back (only 4 of the 6 bits, so it won't disturb the IDE bus itself).
Writing to the IDE bus is done with filling the two 8 bits wide data ports which forms the 16 bit value, then the address is put onto the command port where the value is driven to the IDE bus initiated by the "write" bit. The read process is done in the reversed order: the read is done with the address bit and the "read" bit via the command port. In this case, the read is processed on the IDE bus, the 16 bit result is latched on the card, and it can be accessed with reading the two 8 bit data ports then.
Programming the hard disks themselves is specified in the ATA standard. Currently the following commands are interesting for us: IDENTIFY DEVICE, INITIALIZE DEVICE PARAMETERS, READ SECTOR, READ MULTIPLE, WRITE SECTORS, WRITE MULTIPLE, SET MULTIPLE. Addressing is done in LBA mode primarily, since the software itself also uses LBA addressing internally. If the hard disk does not support LBA (so it's older something like 18-20 years) then the address is converted into CHS.
Let's continue with the IDE registers. For this, there is an older ATA standard here which also contains the CHS addressing and it also has a quite neat summary table about the register addresses (page 14).
Unfortunately, there was a minor mistake with the PCB design: address lines A1 and A0 are swapped. Though, it does not cause a bigger problem, only I had to define my constants differently in my software. It will cause some additional work for Istvan if he put this into the ep128 emulator.
Originally there are three address bits and two Chip Select (CS) signals (I have the suspect that it's from some ancient times of the MFM controllers) on IDE. Since only one of the two CS signals is used simultaneously, I've replaced one with an additional address bit.
0000: Data
0010: Error / Features
0001: Sector Count
0011: Sector Number / LBA( 7: 0)
0100: Cylinder Low / LBA(15: 8)
0110: Cylinder High / LBA(23:16)
0101: Device/Head / LBA(27:24)
0111: Status / Command
1101: Alternate Status / Device Control
1111: Drive Address (it's only specified in the ATA-1 standard, later versions
mention it as obsoleted)
Zozosoft
74HCT273 - 6 pieces 74HCT373 - 6 pieces 74HCT04 - 1 piece 74HCT08 - 1 piece 74HCT21 - 1 piece 74HCT32 - 2 pieces 74HCT245 - 1 piece 74HCT139 - 1 piece 7805 stab. IC - 1 piece 100 uF elco - 1 piece 10 uF elco - 1 piece 100 nF capacitor - 19 pieces 40 pin connector - 2 pieces LED (as you wish) - 2 pieces 220 ohm resistor - 2 pieces
If you want to use two cards then you also need a three pin connector
with a jumper.
If you don't have HCT, you can also use ACT, or even LS, ALS,
etc (but then you may need to cool the 7805) The 273s and 373s should be the
same type to avoid timing problems caused by the fact that some bits set up
faster than the others.